A computing task now has two representation forms. On a general purpose processor, a task is generally presented in a form of software code, and is referred to as a software task. The software task has advantages of being highly flexible and easy to modify and debug, but has a disadvantage of a non-ideal computing speed. On an application-specific integrated circuit, a task is generally presented in a form of a dedicated hardware circuit, and is referred to as a hardware task. The hardware task has an advantage of a high speed, but has disadvantages of being not flexible and not easy to debug. The heterogeneous multi-core reconfigurable computing platform is an effective approach to a trade-off between the conventional general purpose processor and the application-specific integrated circuit. The heterogeneous multi-core reconfigurable computing platform can not only use a reconfigurable logic device to obtain a very high speedup ratio, but can also use a reconfigurable technology or add a general purpose processor core to implement high flexibility. The heterogeneous multi-core reconfigurable computing platform eliminates drawbacks of the application-specific integrated circuit, such as high costs and lack of reusability that are caused by a complex earlier-stage designing and manufacturing process.
The heterogeneous multi-core reconfigurable computing platform may be classified into a static reconfigurable platform and a dynamic reconfigurable platform according to a reconfigurable characteristic of the computing platform. Static reconfiguration refers to static re-loading of a logic function of a target system, that is, online programming is performed in various manners while the system is idle. Dynamic reconfiguration refers to dynamically configuring a logic function of a reconfigurable logic device in real time while the system runs in real time, which can reconfigure a to-be-modified internal logic unit without affecting normal work of an unmodified logic unit. Compared with static reconfiguration, dynamic reconfiguration shortens reconfiguration time, reduces overheads for reconfiguring a system, and improves system running efficiency. Therefore, an inevitable trend is for a future heterogeneous multi-core platform to support dynamic reconfiguration.
Hardware tasks on the heterogeneous multi-core reconfigurable platform are generally executed concurrently. At a moment when a system runs, multiple running hardware tasks and multiple hardware tasks in a ready state exist in the system. In task scheduling, not only an execution time and scheduling overheads of the hardware task itself need to be considered, but also reconfiguration overheads need to be considered. At a moment when the system cannot implement a function requested by the hardware task (for example, the function may be to perform a logic operation or video processing), reconfiguration needs to be performed, and an idle reconfigurable logic resource in the system is reconfigured into the function requested by the hardware task. The reconfiguration overheads are generally not ignorable. In hardware task scheduling, it is required to maximally reduce times of reconfiguration while ensuring overall performance of the system, so as to achieve a purpose of reducing reconfiguration overheads.